Computer Aided Verification

Computer Aided Verification: 12th International Conference, CAV 2000, Chicago, IL, USA, July 15-19, 2000. ProceedingsAuthor: E. Allen Emerson, Aravinda Prasad Sistla Published by Springer Berlin Heidelberg ISBN: 978-3-540-67770-3 DOI: 10.1007/10722167Table of Contents:Keynote Address: Abstraction, Composition, Symmetry, and a Little Deduction: The Remedies to State Explosion
Invited Address: Applying Formal Methods to Cryptographic Protocol Analysis
Invited Tutorial: Boolean Satisfiability Algorithms and Applications in Electronic Design Automation
Invited Tutorial: Verification of Infinite-state and Parameterized Systems
An Abstraction Algorithm for the Verification of Generalized C-Slow Designs
Achieving Scalability in Parallel Reachability Analysis of Very Large Circuits
An Automata-Theoretic Approach to Reasoning about Infinite-State Systems
Automatic Verification of Parameterized Cache Coherence Protocols
Binary Reachability Analysis of Discrete Pushdown Timed Automata
Boolean Satisfiability with Transitivity Constraints
Bounded Model Construction for Monadic Second-Order Logics
Building Circuits from Relations
Combining Decision Diagrams and SAT Procedures for Efficient Symbolic Model Checking
On the Completeness of Compositional Reasoning
Counterexample-Guided Abstraction Refinement
Decision Procedures for Inductive Boolean Functions Based on Alternating Automata
Detecting Errors Before Reaching Them
A Discrete Strategy Improvement Algorithm for Solving Parity Games
Distributing Timed Model Checking — How the Search Order Matters
Efficient Algorithms for Model Checking Pushdown Systems